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ARM Cortex™-A15 MPcore processor


ARM Cortex-A8의 특징

Frequency from 600 MHz to 1 GHz and above.
Superscalar dual-issue microarchitecture.
NEON SIMD instruction set extension (optional).
VFPv3 Floating Point Unit (optional).
Thumb-2 instruction set encoding.
Jazelle RCT.
Advanced branch prediction unit with >95% accuracy.
Integrated Level 2 Cache (0-4 MB).
2.0 DMIPS / MHz



ARM Cortex-A9의 특징

Out-of-order speculative issue superscalar execution pipeline giving 2.50 DMIPS/MHz/core.[2]
NEON SIMD instruction set extension performing up to 16 operations per instruction (optional).
High performance VFPv3 Floating Point Unit doubling the performance of previous ARM FPUs (optional).
Thumb-2 instruction set encoding reduces the size of programs with little impact on performance.
TrustZone security extensions.
Jazelle DBX support for Java execution.
Jazelle RCT for JIT complilation.
Program Trace Macrocell and CoreSight Design Kit for unobtrusive tracing of instruction execution.
L2 cache controller (0-4 MB).
Dual-Core Processing
ARM states that the TSMC 40G hard macro implementation typically operating at 2GHz; a single core (excluding caches) occupies less than 1.5 mm2 when designed in a TSMC 65 nanometer (nm) generic process[3] and can be clocked at speeds over 1 GHz and consumes less than 250 mW per core


ARM Cortex-A15의 특징

Out-of-order speculative issue superscalar execution pipeline, providing up to 5 times the performance of Cortex-A9 MPCore.
DSP and NEON SIMD extensions onboard.
VFPv4 Floating Floating Point Unit onboard.
64-bit Large Physical Address Extensions (LPAE) addressing up to 1TB of RAM.
Hardware virtualization support.
Thumb-2 instruction set encoding reduces the size of programs with little impact on performance.
TrustZone security extensions.
Jazelle DBX support for Java execution.
Jazelle RCT for JIT complilation.
Integrated low-latency level-2 cache controller, up to 4MB.
Program Trace Macrocell and CoreSight Design Kit for unobtrusive tracing of instruction execution.

Cortex a-15의 캐시 32KB/32KB L1, up to 4MB L2, MMU+TrustZone

 


Cortex-A8 칩셋은 Texas Instruments OMAP3xxx series, FreeScale i.MX51-SOC, Apple A4, ZiiLABS ZMS-08, Qualcomm Snapdragon QSD8x50(A)/MSM7x30/MSM8255 등이 있으며 아이팟터치(3,4세대),아이폰3GS,아이폰4,아이패드,갤럭시S,드로이드,드로이드2,드로이드X 등 현재 많은 핸드폰에 사용 되고 있습니다.

Cortex-A9 칩셋은 Texas Instruments OMAP4430/4440, ST-Ericsson U8500 / U5500, Nvidia Tegra2, Qualcomm Snapdragon QSD8672/MSM8260/MSM8660, Samsung Orion, STMicroelectronics SPEAr1300, Xilinx Extensible Processing Platform [3], Trident PNX847x/8x/9x STB SoC 등이 있으며
듀얼코어 칩셋이며 삼성의 오리온,퀄컴의 스냅드래곤,엔비디아의 테그라2 등입니다.
곧 LG에서 엔비디아의 테그라2 듀얼코어 칩셋을 사용한 LG Star 폰에 출시됩니다.


Cortex-A15 칩셋은  Qualcomm Snapdragon MSM8270/MSM8960, Texas Instruments OMAP5, Samsung, ST Ericsson 등이 있습니다.
퀄컴의 4세대 스냅드래곤 MSM8270와 MSM8960은 2011년에 공개 됩니다


http://www.arm.com/products/processors/cortex-a/cortex-a15.php

http://en.wikipedia.org/wiki/ARM_Cortex-A15_MPCore
http://en.wikipedia.org/wiki/ARM_architecture

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